Design and implementation of a constant-Time FPGA accelerator for fast elliptic curve cryptography

Basit Öğe Kaydı
dc.contributor.authorAy, Atıl U.
dc.contributor.authorÖztürk, Erdinç
dc.contributor.authorHenriquez, F.R.
dc.contributor.authorSavaş, Ekrem
dc.date.accessioned2020-11-21T15:56:23Z
dc.date.available2020-11-21T15:56:23Z
dc.date.issued2016en_US
dc.departmentİstanbul Ticaret Üniversitesien_US
dc.description2016 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2016 -- 30 November 2016 through 2 December 2016 -- -- 126407en_US
dc.description.abstractIn this paper we present a scalar multiplication hardware architecture that computes a constant-Time variable-base point multiplication over the Galbraith-Lin-Scott (GLS) family of binary elliptic curves. Our hardware design is especially tailored for the quadratic extension field F22n, with n = 127, which allows us to attain a security level close to 128 bits. We explore extensively the usage of digit-based and Karatsuba multipliers for performing the quadratic field arithmetic associated to GLS elliptic curves and report the area and time performance obtained by these two types of multipliers. Targeting a XILINX KINTEX-7 FPGA device, we report a hardware implementation of our design that achieves a delay of just 3.98?s for computing one scalar multiplication. This allows us to claim the current speed record for this operation at or around the 128-bit security level for any hardware or software realization reported in the literature. © 2016 IEEE.en_US
dc.identifier.doi10.1109/ReConFig.2016.7857163en_US
dc.identifier.isbn9781510000000
dc.identifier.scopus2-s2.0-85015094885en_US
dc.identifier.scopusqualityN/Aen_US
dc.identifier.urihttps://doi.org/10.1109/ReConFig.2016.7857163
dc.identifier.urihttps://hdl.handle.net/11467/4127
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.relation.ispartof2016 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2016en_US
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.titleDesign and implementation of a constant-Time FPGA accelerator for fast elliptic curve cryptographyen_US
dc.typeConference Objecten_US

Dosyalar

Koleksiyon

Scopus İndeksli Yayınlar Koleksiyonu
WoS İndeksli Yayınlar Koleksiyonu