Accelerating ltv based homomorphic encryption in reconfigurable hardware

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dc.contributor.authorDoroz, Yarkın
dc.contributor.authorÖztürk, Erdinç
dc.contributor.authorSavaş, Ekrem
dc.contributor.authorSunar, Berk
dc.date.accessioned2020-11-21T15:53:25Z
dc.date.available2020-11-21T15:53:25Z
dc.date.issued2015en_US
dc.departmentİstanbul Ticaret Üniversitesien_US
dc.descriptionInternational Workshop on Cryptographic Hardware and Embedded Systems, CHES 2015 -- 13 September 2015 through 16 September 2015 -- -- 140709en_US
dc.description.abstractAfter being introduced in 2009, the first fully homomorphic encryption (FHE) scheme has created significant excitement in academia and industry. Despite rapid advances in the last 6 years, FHE schemes are still not ready for deployment due to an efficiency bottleneck. Here we introduce a custom hardware accelerator optimized for a class of reconfigurable logic to bring LTV based somewhat homomorphic encryption (SWHE) schemes one step closer to deployment in real-life applications. The accelerator we present is connected via a fast PCIe interface to a CPU platform to provide homomorphic evaluation services to any application that needs to support blinded computations. Specifically we introduce a number theoretical transform based multiplier architecture capable of efficiently handling very large polynomials. When synthesized for the Xilinx Virtex 7 family the presented architecture can compute the product of large polynomials in under 6. 25 msec making it the fastest multiplier design of its kind currently available in the literature and is more than 102 times faster than a software implementation. Using this multiplier we can compute a relinearization operation in 526 msec. When used as an accelerator, for instance, to evaluate the AES block cipher, we estimate a per block homomorphic evaluation performance of 442 msec yielding performance gains of 28. 5 and 17 times over similar CPU and GPU implementations, respectively. © International Association for Cryptologic Research 2015.en_US
dc.description.sponsorshipNational Science Foundation, NSF: 1319130 -- -- -- Cryptography Research;Etal;Pole D’Excellence Cyber;Serma Technologies;Texas Instruments;Thales, la Region Bretagneen_US
dc.identifier.doi10.1007/978-3-662-48324-4_10en_US
dc.identifier.endpage204en_US
dc.identifier.issn0302-9743
dc.identifier.issn9.78366E+12
dc.identifier.scopus2-s2.0-84946060077en_US
dc.identifier.scopusqualityQ3en_US
dc.identifier.startpage185en_US
dc.identifier.urihttps://doi.org/10.1007/978-3-662-48324-4_10
dc.identifier.urihttps://hdl.handle.net/11467/3579
dc.identifier.volume9293en_US
dc.identifier.wosWOS:000406189700010en_US
dc.identifier.wosqualityN/Aen_US
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.language.isoenen_US
dc.publisherSpringer Verlagen_US
dc.relation.ispartofLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)en_US
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/openAccessen_US
dc.subjectFPGAen_US
dc.subjectNTT multiplicationen_US
dc.subjectSomewhat homomorphic encryptionen_US
dc.titleAccelerating ltv based homomorphic encryption in reconfigurable hardwareen_US
dc.typeConference Objecten_US

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